Micrel, Inc.
Message Coding and Formatting
DC Balanced Line Coding
MICRF507
Line coding, diagrammed in Figure 24, is used when a
communication channel imposes constraints on bit
sequences. An encoding stage that ensures DC balance
(equal numbers of ‘1’ and ‘0’ bits and no long consecutive
runs of either) in the encoded bit stream allows the use of
VCO modulation without restrictions on the message bit
stream. Of the coding schemes which meet this need,
Manchester encoding and 3B4B are among the most
commonly used. Programming and performance of the
MICRF507 are based on the encoded bit rate.
In Manchester encoding, each message bit maps to a
Data
000
001
010
011
100
101
110
111
Word A
1011
1100
0011
1010
0101
1001
0110
1101
Word B
0100
0010
word made of two encoded bits as shown in Table 22. The
encoded bit rate is twice the message bit rate so the
encoding overhead is 100%. When selecting PLL loop
Table 23. 3B4B Encoding
filter it is important to note that frequency content of the
encoded bit stream extends down to one-fourth of the
encoded bit rate. That is the case of a 0101… message
bit sequence, which results in a 100110011001… encoded
bit sequence.
Data bits
000 000 000 000
000
Encoded words
1011 0100 1011
0100 1011
Comments
A Flag indicates
if “Word A” has
been used
Data
Word
111 111 010 110
000
1101 0010 0011
0110 1011
A Flag indicates
if “Word A” has
been used
“0”
“10”
“1”
“01”
Table 24. Example of 3B4B Encoding
Table 22. Manchester Encoding
Another encoding method, which is much more efficient
than Manchester coding, is 3B4B, where three message
data bits are encoded into a four-line-bit word. The
encoded bit rate is three-quarter times the message bit
Message Formatting: Preamble
Messages are typically preceded by a header consisting of
24 bits in an alternating pattern: 0101… Such a header
can permit the following actions by the receiver prior to the
arrival of information-carrying bits:
? Reading of RSSI
rate. For perfect DC balance, a four bit word would have to
have two ‘1’ line bits and two ‘0’ line bits. Only six such
words are possible. Special steps are therefore needed to
?
?
Bit synchronizer lock-up
Using the FEE to null out frequency offset
deal with the remaining two encodings: whenever 000 and
111 data appear, toggle a flag that remembers whether the
last encoded word was taken from the “Word A” column
and select the respective word from the other column
shown in Table 23.
Figure 24. Link Architecture with Encoding
October 2, 2013
34
Revision 2.2
相关PDF资料
MICRF600DEV1 KIT DEV RADIOWIRE 902-928MHZ
MK01-C SENSOR REED SPST-NO SMD
MK01-H SENSOR REED SPDT-CHANGE SMD
MK02/0-1A66-500W SENSOR REED SPST-NO
MK02/6-0 SENSOR REED PCB 24MM T/H
MK03-1C90C-500W SENSOR REED SPDT CYLINDER
MK05-1A66C-500W SENSOR REED SPST-NO SCREW MOUNT
MK06-6-A SENSOR REED SPST-NO SIL T/H
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